Title:
【発明の名称】半導体加速度計の懸架構造
Document Type and Number:
Japanese Patent JP3429780
Kind Code:
B2
Abstract:
A suspension mounting arrangement for a suspended layer in a semiconductor accelerometer, the layer being suspended above and spaced apart from a substrate. The arrangement includes a common anchor point associated with the substrate; first and second anchor points associated with the suspended layer; a first flexible serpentine arm coupled between the first anchor point and the common anchor point; and a second flexible serpentine arm coupled between the second anchor point and the common anchor point. The first and second flexible serpentine arms are symmetrically configured with respect to one another.
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Inventors:
Judy Michael W
Application Number:
JP50482099A
Publication Date:
July 22, 2003
Filing Date:
June 18, 1998
Export Citation:
Assignee:
Analog Devices Incorporated
International Classes:
G01P15/125; G01P15/18; H01L29/84; (IPC1-7): G01P15/125; H01L29/84
Domestic Patent References:
JP5249138A | ||||
JP9318649A |
Other References:
【文献】米国特許5025346(US,A)
Attorney, Agent or Firm:
Kenji Yoshida (1 person outside)