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Title:
BUS ARBITER
Document Type and Number:
Japanese Patent JPH0749831
Kind Code:
A
Abstract:

PURPOSE: To provide a bus arbiter which performs dynamic control as to the priority of bus arbitration so that the right to use a common bus is allocated to a proper bus master at all times as to a bus arbiter which arbitrates bus acquisition requests from plural bus maters connected to the common bus.

CONSTITUTION: A priority control part 8, once detecting an event detection signal 7, asserts a bus arbitration stop signal 10 and temporarily interrupts normal bus arbitrating operation. Then operation for allocating the right to use the bus to an event which needs to use the bus preferentially is performed. The priority control part 8 waits for a bus acquisition request signal 5a to be asserted first and asserts a priority control signal 9a. When the bus acquisition request signal 5a is negated, the priority control part 8 negates the priority control signal 9a. This processing makes the every possible which should be given priority first to use the bus.


Inventors:
MIURA SHIN
NAKAJIMA KOICHI
Application Number:
JP19491293A
Publication Date:
February 21, 1995
Filing Date:
August 05, 1993
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
G06F13/362; (IPC1-7): G06F13/362
Attorney, Agent or Firm:
Takada Mamoru



 
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