PURPOSE: To obtain a semiconductor integrated circuit having an inputting/ outputting circuit with a common input/output terminal without causing to flow a penetrating current into an input receiver at the time of floating in an output buffer.

CONSTITUTION: The device provide an input control circuit 21 supplying an output signal which is subjected to the transition from a first to a second potential levels according to the rise (or the fall) of a detection signal (ATD) for an address transition and recovered to the first potential level according to the fall(or the rise) after the lapse of a prescribed time and an input latching circuit 20 for latching the output of the input receiver 11. The output signal from the input control circuit 21 is utilized for a chip selection signal for the input receiver 11 and the latching control signal of the input latching circuit 20.