PURPOSE: To expand the adjusting range of a pulse width by installing a gate which executes the exclusive OR of an input signal and of a most-significant bit signal for an adjustment control signal, a delay gate circuit which delays its output and the like.

CONSTITUTION: An output signal IN is inputted to an exclusive-OR gate 1, and its output 1a is inputted to a delay gate circuit 3 and a residual-delay correction circuit 2. The output 1a of the gate 1 is set to a sense which is inverse to the input signal IN when pulses are made thick by a most significant bit(MSB) for an adjustment control signal CNT, and it is set to a sense which is identical when they are made thin. The signal 1a which is inputted to the gate 3 is delayed by the signal CNT. The signal 1a which is inputted to the correction circuit 2 is delayed by the fixed delay portion of the gate 3, it is ANDed by a gate 4, and the exclusive OR of its output 4a of the MSB for the signal CNT is executed by a gate 5 and outputted. Thereby, the adjusting range of a pulse width can be made large, and it takes the same route even when the pulse width is made wide or narrow.