PURPOSE: To make a circuit scale small by using a transmission buffer also as a reception buffer by providing a preunit which transmits/receives the endmost bit and bits other than that of transmission or reception data based on a write permission signal, a write control signal, and a clock signal.

CONSTITUTION: A timing generation circuit 11 outputs the write permission signal, first to third clock signals, and first and second write control signals (WE, CK1-CK3, and PLO, TLO). The pre- and endmost input/output units U1-Un output by converting the transmission/reception data (Dout or Din) of (n) bits P/S-transferred via a bus. At this time, the unit Un holds the endmost bit of the data Dout or Di and the units U1-Un hold the bits other than that with the signals except for the signal CK2 in first and second transmission/reception buffers B1, B2 transiently. In this way, a dedicated transmission/reception buffer can be eliminated, thereby the circuit scale can be made small.