Title:
【発明の名称】両エッジトリガーフリップフロップを有する電子回路
Document Type and Number:
Japanese Patent JP2001508275
Kind Code:
A
Abstract:
The electronic circuit contains dual edge triggered flip-flop, which loads data on both the rising edge and the falling edge of a clock signal. The clock signal is supplied by a clock supply circuit with an enable input and a source input for receiving a source signal. The clock supply circuit toggles the clock signal as from an earliest available edge of the source signal after the enable signal at the enable input switches to an active state, irrespective of a polarity of said earliest available edge.
Inventors:
Pesset ropith rafael
Application Number:
JP52798399A
Publication Date:
June 19, 2001
Filing Date:
October 19, 1998
Export Citation:
Assignee:
Konin Krekka Philips Electronics NV
International Classes:
H03K3/012; H03K3/037; H03K3/12; H03K3/286; H03K3/356; (IPC1-7): H03K3/037
Attorney, Agent or Firm:
Akihide Sugimura (2 outside)