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Patent Searching and Data


Title:
MEMORY CELL OF MASK ROM
Document Type and Number:
Japanese Patent JPH0661455
Kind Code:
A
Abstract:

PURPOSE: To provide a multivalued ROM wherein a plurality of bits can be stored by a single memory cell by a method wherein the electrostatic capacitance of a capacitor as the memory cell is detected and its capacitance level is discriminted.

CONSTITUTION: A memory cell is constituted of conductive layers 11 wired in parallel in the transverse direction and of conductive layers 12 arranged in parallel in a direction perpendicular to the transverse direction. An insulating film 14 exists between conductive layers as the conductive layers 11, 12 and the matrix of capacitors is constituted of parts (shaken parts) in which the plurality of rectangular conductive layers 11, 12 are facing. The individual capacitors act as memory cells, and their capacitance can be set to a plurality of levels by changing the facing area between the conductive layers as the conductive layers 11, 12.


Inventors:
NOGAMI KAZUTAKA
Application Number:
JP21409892A
Publication Date:
March 04, 1994
Filing Date:
August 11, 1992
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
G11C11/56; H01L21/8246; H01L27/112; (IPC1-7): H01L27/112
Attorney, Agent or Firm:
Takehiko Suzue