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Patent Searching and Data


Title:
SEMICONDUCTOR RAM
Document Type and Number:
Japanese Patent JPH07121351
Kind Code:
A
Abstract:

PURPOSE: To provide a RAM with a built-in arithmetic function for performing an arithmetic operation based on memory contents at a high speed and outputting signals for controlling write to the other RAM or a memory block.

CONSTITUTION: The contents of a selected memory cell appear in bit and bit inversion signal lines and the contents are amplified to a level sufficient for 1/0 judgement by a sense circuit 14. Thereafter, the signals Douy0, Dout1 and Doutk read from the sense circuit 14 are compared with the data of data lines D0, D1 and Dk in a comparator circuit '16 and when set comparison conditions are satisfied (when the value of the data line is larger than the value of the signal read from the sense circuit 14, for instance,) a write circuit 15 is turned to an active state so as to write the data of the data lines D0, D1 and Dk and the data are forcedly written.


Inventors:
YAMAGUCHI AKIRA
Application Number:
JP26705493A
Publication Date:
May 12, 1995
Filing Date:
October 26, 1993
Export Citation:
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Assignee:
SHARP KK
International Classes:
G06F12/00; G06F3/153; (IPC1-7): G06F3/153; G06F12/00
Attorney, Agent or Firm:
Yoshio Kawaguchi (1 person outside)