PURPOSE: To prevent interference due to the spurious electromagnetic wave of a clock higher harmonic from occurring and for best performances of a radio communications system by changing the fundamental frequency of an operating clock only when communication is performed.
CONSTITUTION: When a power source is applied and a reset signal 92 is outputted, the frequency of PLL circuit output 24 is set so as to be equal to the frequency of square wave generator output 23 at the maximum frequency. When radio communication is used, a judged result representing the presence/ absence of communication can be set on a targeted communications area. When a higher harmonic component exists, the frequency of the output 24 is shifted in a direction to make the frequency small so as to prevent the higher harmonic component in the communications area. In such a case, a CPU 10 sets the required number of frequency division on a shift register 22 via an I/O bus controller 12. When it is set, ordinary communications processing is performed, and when it is completed, another ordinary processing is performed, then, processing is shifted to the one to judge whether or not the radio communications is used.
HARA ATSUSHI
YOSHITOME HITOSHI
HIROTA KAZUO
