PURPOSE: To obtain a method for efficiently generating dummy wiring patterns for flattening to the required min. extent in designing and producing the metallic wiring patterns formed in a semiconductor circuit.

CONSTITUTION: A photolithography mask obtd. by subjecting all the wiring patterns designed for the purpose of obtaining desired device characteristics to a mutual comparison of the wiring patterns of the respective layers of multilayered metallic wirings, generating dummy patterns 3 in the case the spacings with the first layer wiring patterns 1 right under the second layer wiring patterns 2 are parted at ≥2 times the wiring pitch when there is the nearest pattern in the second layer wiring patterns 2 and synthesizing such patterns with the compared first layer wiring patterns 1 is used at the time of automatically designing the multilayered metallic wirings of a semiconductor device.