PURPOSE: To obtain an IC-implemented clock pulse supply circuit for the synchronous logic circuit which can compensate the phase delay of clock pulses passing through a clock distributing circuit.

CONSTITUTION: A phase advancing circuit 11 which advances the phase of clock pulses generated by the clock oscillator 10 is provided in front of the clock distributing circuit 12 which supplies the clock pulses, generated by the clock oscillator 10, in a specific phase state to the synchronous logic circuit 14. Consequently, phase delay in the clock distributing circuit 12 can be compensated.