Title:
ILLUSTRATING PROGRAMMING DEVICE OF PROGRAMMABLE CONTROLLER
Document Type and Number:
Japanese Patent JPS58105302
Kind Code:
A
Abstract:
PURPOSE:To improve the efficiency for the development and formation of a program, by calling out and then illustrating a formulated standard circuit form a memory and then giving additions and corrections of data to the standard circuit to form a user program. CONSTITUTION:A standard circuit memory 9 stores a formulated unfinished program in the form of a standard circuit. Then the standard circuit is displayed on the screen of a CRT6 from the memory 9, and the mode key on a keyboard 5 is set in a circuit formation mode to execute a forming routine of a program. Then the number of a certain circuit element in the standard circuit is set by setting a display cursor at its symbol area and then pushing a ten-key. The writing key is pushed to fix the circuit element to which the number is added. Thus the deletions/additions and corrections are given to the standard circuit displayed on the CRT6 in terms of the element number, the change of the circuit element, etc.
Inventors:
HAGIWARA TOMIO
TATEBAYASHI HIROSHI
TATEBAYASHI HIROSHI
Application Number:
JP20413081A
Publication Date:
June 23, 1983
Filing Date:
December 16, 1981
Export Citation:
Assignee:
OMRON TATEISI ELECTRONICS CO
International Classes:
G05B19/05; G06F9/06; (IPC1-7): G05B19/02; G06F9/00; G06F9/06
Domestic Patent References:
| JPS5750008A | 1982-03-24 | |||
| JPS57185508A | 1982-11-15 | |||
| JPS581207A | 1983-01-06 |
Attorney, Agent or Firm:
Shigenori Wada