PURPOSE: To attain high speed compression processing for image data by providing a variable length coding processor and a pipeline control processor applying pipeline control to the processing the processing unit.
CONSTITUTION: The processing unit is provided with a control unit 2 having two processors, a pixel processing unit 3 for DCT and quantization, a moving prediction (or detection) unit 41 and a frame buffer memory 51 or the like storing processed image data. Then the picture element processor executes discrete cosine transformation processing and quantization processing to picture element data sent via a picture element data bus and the variable length coding processor executes the picture element coding processing. Furthermore, the pipeline control processor controls the processing in each processor and pipeline processing in the data transfer via a bus. Thus, the compression processing of picture data is implemented at a high speed.
NAKAGAWA SHINICHI
SEGAWA HIROSHI
ISHIHARA KAZUYA
KUMAKI SATORU
HANAMI MITSUO
Next Patent: IMAGE DATA COMPRESSION AND EXPANSION