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Title:
IMAGE MEMORY CONSTITUTING SYSTEM
Document Type and Number:
Japanese Patent JPS6010963
Kind Code:
A
Abstract:

PURPOSE: To improve the utility of a device by connecting the two-dimensionally required number of an image memory at the image processing operation of an expansion mode so as to adapt the image processing device to the sorts of picture element density and pattern size.

CONSTITUTION: The plane address of an image address at the expansion mode is given to every most significant bit YA12, XA11 of Y and X addreses and the plane of the four image memories are accessed as a single plane. The address in each image memory plane is given by the Y address counter outputs YA00∼ YA11 and the X address counter outputs XA00∼XA10 and given to a Y address bus 14 and an X address bus 15. An access control circuit 12 is controlled by an expansion mode signal, and two bits of the YA12, XA11 are selected at the standard mode and two bits of line control adaptors LA1, LA0 are selected at the expansion mode and the selected result is decoded so as to drive one of plane enable line 16.


Inventors:
SEKI TETSUHIKO
MUNAKATA AKIO
ABE SUSUMU
Application Number:
JP11878183A
Publication Date:
January 21, 1985
Filing Date:
June 30, 1983
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H04N1/00; G06F12/00; G06T3/00; (IPC1-7): H04N1/00
Attorney, Agent or Firm:
Fumihiro Hasegawa



 
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