PURPOSE: To speed up the image processing of image memory.

CONSTITUTION: A logical operation part 2 and an arithmetic code register 3 are provided inside an image memory chip 1. The arithmetic code register 3 is constituted of four bits R0-R3. Image data S inputted from the I/O terminal 5 of the image memory chip 1 is inputted to the logical operation part 2 before it is written on a memory cell 6, and simultaneously, data D is outputted from the memory cell 6 on which write is desired to perform. and it is inputted to the logical operation part 2. The logical operation part 2 performs a logical operation among the arithmetic codes R0-R3, the input image data S, and the output data D from the memory cell 6, and a computed result is written on the memory cell 6.