To provide an image processing device that can appropriately adjust transfer of image data even if there is timing constraint in an image input side, and that can fully improve a bus usage rate.

In an image processing device, if transfer of image data from an image input unit 2 to a memory 11 and transfer of image data from the memory 11 to an image output unit 6 occur at the same time, a data transfer amount adjustment unit 5 comprised in a serial communication control unit 4 measures a transfer amount of the image data transferred from the image input unit 2 by the one line, and each time when the data transfer amount adjustment unit 5 performs, by the one line, band check of the band limit about the transfer amount of the image data transferred to the image output unit 6 on the basis of a value measured by the one line, about the transfer amount of the image data transferred from the image input unit 2 in accordance with the transfer amount of the image data transferred to the image output unit 6, a line interval and a transaction interval are changed and set, and the band limitation is dynamically calculated and adjusted by switching according to connection lane number of the PCI-Express standard.