PURPOSE: To realize a high speed programmable LSI for image processing which is capable of coping with all of the image pre-processing, the feature selection processing and the matching processing.
CONSTITUTION: A DMA transfer control part 4 is a part performing a DMA transfer, and reads input data from an external memory and transfers the data to each data memory within an LSI. A sequence control part 8, an instruction memory 7 and an address generation part 3 control the siting/reading for each data memory based on an instruction code. The DMA transfer control part 4 absorbs the waiting time generated at the time of the data transfer from the outside and the control by the instruction code at the inside of the LSI is performed without being affected by the waiting time. An SIMD type parallel arithmetic unit is connected with the output line of each data memory. The parallel arithmetic unit and a post-processing part complete each step of image processings and the post-processing part outputs an output signal 54 to the outside. The waiting time in this case is absorbed by the postprocessing part.
INOUE YOSHITSUGU
ROBAATO SUTORAITENBERUGAA
