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Title:
IN-BAND GROUP DELAY FLATTENING CIRCUIT AND DISTORTION COMPENSATION TYPE AMPLIFIER
Document Type and Number:
Japanese Patent JP2003264404
Kind Code:
A
Abstract:

To provide an in-band group delay flattening circuit indicating excellent group delay flattening characteristics with small-scale circuit structure, in which a wide band with flat group delay can be taken without generating a peak of group delay quantity in the vicinity of edges on the both sides of passing bands and adjustment of band width and group delay time is facilitated, and a distortion compensation type amplifier having the same.

Resonators 2a, 3a, 2b, 3b are respectively connected with two distribution output ports #2, #4 of hybrid couplers 1a, 1b to provide a plurality of stages of projected type group delay circuits. The in-band group delay flattening circuit is totally constituted by differentiating central frequencies of respective projected type group delay circuits.


Inventors:
NAGAHAMA AKIRA
MATSUDAIRA MINORU
YAMADA YASUO
Application Number:
JP2002062162A
Publication Date:
September 19, 2003
Filing Date:
March 07, 2002
Export Citation:
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Assignee:
MURATA MANUFACTURING CO
International Classes:
H01P1/205; H01P1/00; H01P9/00; H03F1/32; (IPC1-7): H01P1/205; H03F1/32
Attorney, Agent or Firm:
Hisao Komori



 
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