To provide an in-line wire error detection and correction scheme.

In an in-line error detection and correction method using wires 0 to (k) and symbols 0 to (n), information bits and symbols are sent along the wires 0 to (k). Before sending an information block along the wires 0 to (k), check bits are calculated from the information bits, wherein the check bits are made up of horizontal parity, extended parity and overall parity of the information. The check bits are sent along the wires 0 to (k), using the same wires as for the information bits.