Title:
表示装置用画素内メモリ
Document Type and Number:
Japanese Patent JP2005521191
Kind Code:
A
Abstract:
Magnetoresistive random access memory (MRAM) is used to provide in-pixel memory circuits for display devices. A memory circuit ( 25 ) comprises two MRAMs ( 60, 62 ), each coupled to a respective input of a flip-flop circuit ( 64 ). A display device ( 1 ) is provided comprising a plurality of pixels ( 20 ) each associated with a memory circuit ( 25 ). A bit line ( 45 ) passes over and contacts a first MRAM ( 60 ) in a first direction and a second MRAM ( 62 ) in a second direction, the first and second directions being substantially opposite to each other. This provides opposite resistance states in the two MRAMs ( 60, 62 ). The bit line ( 45 ) does not pass over a word line ( 43 ), thereby avoiding or reducing overlap capacitance losses. The word line ( 43 ) is formed during a same masking stage as a gate line ( 44 ). The bit line ( 45 ) is formed during a same masking stage as a column line ( 54 ).
Inventors:
Peter, Yeh. Fan, Dell, Zerg
Martin, Jay Edwards
Carls-Michiel, Ha. Rensen
Martin, Jay Edwards
Carls-Michiel, Ha. Rensen
Application Number:
JP2003579229A
Publication Date:
July 14, 2005
Filing Date:
February 17, 2003
Export Citation:
Assignee:
Koninklijke Philips Electronics N.V.
International Classes:
G02F1/133; G02F1/1368; G09F9/30; G09G3/20; G11C11/14; G11C11/15; G11C11/16; G11C11/411; H01L21/8246; H01L27/105; (IPC1-7): G11C11/15; G02F1/133; G02F1/1368; G11C11/411
Attorney, Agent or Firm:
Kenji Yoshitake
Hidetoshi Tachibana
Yasukazu Sato
Hiroshi Yoshimoto
Yasushi Kawasaki
Akaoka Akira
Hidetoshi Tachibana
Yasukazu Sato
Hiroshi Yoshimoto
Yasushi Kawasaki
Akaoka Akira