Title:
INFORMATION PROCESSING APPARATUS OF PROCESSOR DUPLEXING SYSTEM
Document Type and Number:
Japanese Patent JP3539687
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To specify a processor with a fault with a simple structure without using a diagnostic processor and the like, and continue the processing being executed at the time of the occurrence of a mismatch fault without stopping a system.
SOLUTION: If either of two processors operated synchronously has an internal fault to cause a mismatch fault causing a mismatch of the outputs of both of them, a controlling means specifys a faulty processor, and continues the processing being executed at the time of the occurrence of the mismatch fault with the use of internal information on a faultless processor and via a duplexed structure.
Inventors:
Hiroshi Oguro
Koichi Ikeda
Takaaki Nishiyama
Hiroshi Iwamoto
Koichi Ikeda
Takaaki Nishiyama
Hiroshi Iwamoto
Application Number:
JP2001400603A
Publication Date:
July 07, 2004
Filing Date:
September 17, 1992
Export Citation:
Assignee:
株式会社日立製作所
International Classes:
G06F11/18; G06F13/00; (IPC1-7): G06F11/18
Domestic Patent References:
| JP2171837A | ||||
| JP1145734A | ||||
| JP1297734A | ||||
| JP58109944A | ||||
| JP3015946A |
Attorney, Agent or Firm:
Akita Haruki