To improve high security and power saving efficiency with a simple configuration.
An information processing device capable of shifting to a power saving mode includes a main MPU 101 for controlling a shift or a return to/from the power saving mode, and a LAN I/F 112 for transmitting an information communication signal to the outside. The LAN I/F 112 includes: a reception operation circuit 122b for acquiring an input signal; a ROM 123b for storing an identification (ID) to identify a PC 15 that uses a function provided by the information processing device through a network; and an ID discrimination circuit 123a for acquiring the ID from the acquired signal according to a predetermined protocol, and for outputting a signal instructing to return from the power saving mode, when the acquired ID is stored in the ROM 123b.
JP2006270538A | 2006-10-05 | |||
JP2010125616A | 2010-06-10 | |||
JP2006113947A | 2006-04-27 | |||
JP2008258895A | 2008-10-23 | |||
JP2003228444A | 2003-08-15 | |||
JP2004193807A | 2004-07-08 |
WO2010004614A1 | 2010-01-14 |
Akinari Tachibana
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