Title:
情報処理装置及びストア命令制御方法
Document Type and Number:
Japanese Patent JP4128551
Kind Code:
B2
Abstract:
In order to increase the operation efficiency of the operation register for holding store data when executing store instruction to store data in a predetermined store area on the main memory or the cache memory, in the present invention, an instruction processing section (10) is adapted so as, when an operation register (22) holding the operation result is determined, causes the operation result to be issued from the operation register (22) to store buffers (50-0 - 50-n) as store data; when the store data are held by the store buffers (50-0 - 50-n) before the store instruction is held by store ports (30-0-30-n), a restraint section (82) restrains a reset section (81) from setting a store data hold flag (30d) to OFF at a point of time when the store instruction is held by the store ports (30-0-30-n) to maintain the store data hold flag (30d) to ON.
Inventors:
Takashi Miura
Yamazaki Iwao
Yamazaki Iwao
Application Number:
JP2004222044A
Publication Date:
July 30, 2008
Filing Date:
July 29, 2004
Export Citation:
Assignee:
富士通株式会社
International Classes:
G06F9/38; G06F12/00; G06F12/08
Domestic Patent References:
| JP60123936A | ||||
| JP589274A | ||||
| JP8504977A |
Foreign References:
| WO2001053951A1 |
Attorney, Agent or Firm:
Yu Sanada