Title:
メモリを制御する情報処理装置
Document Type and Number:
Japanese Patent JP6711590
Kind Code:
B2
Abstract:
A control apparatus that controls a memory, where the memory is capable of being shifted in accordance with a control signal to a power saving state. According to one embodiment, the control apparatus shifts the memory to the power saving state using the control signal on a basis of stopping of a clock signal input to the memory.
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Inventors:
Toshio Yoshihara
Application Number:
JP2015215216A
Publication Date:
June 17, 2020
Filing Date:
October 30, 2015
Export Citation:
Assignee:
Canon Inc
International Classes:
G06F1/04; G06F1/3237; G11C11/34
Domestic Patent References:
| JP2013025843A | ||||
| JP2011150653A | ||||
| JP2007134840A | ||||
| JP2012150593A |
Attorney, Agent or Firm:
Takuma Abe
Sogo Kuroiwa
Sogo Kuroiwa