Title:
情報処理装置
Document Type and Number:
Japanese Patent JP7226084
Kind Code:
B2
Abstract:
The present invention suppresses the occurrence of memory contention without executing, in an operation unit of a control device, a reconciliation process for preventing memory contention. Provided is a unit (20) that causes transmission of smallest payload data (D8) to a communication interface (42) to be in standby during a time period (T3) from a time (t5), at which it is determined that a transmission time (T2) of smallest payload data (D6) exceeds a reference value during a control cycle (C2), to a time (t6) at which the communication interface (42) transmits the smallest payload data (D8) to be transmitted next after the most recent smallest payload data (D7) transmitted at the time (t5).
More Like This:
Inventors:
Toshinori Tamai
Application Number:
JP2019093182A
Publication Date:
February 21, 2023
Filing Date:
May 16, 2019
Export Citation:
Assignee:
OMRON Corporation
International Classes:
G06F12/00; G06F13/38
Domestic Patent References:
JP2006031227A | ||||
JP2008250985A | ||||
JP2013120587A | ||||
JP2016192172A | ||||
JP2017142730A |
Foreign References:
WO2015056695A1 |
Attorney, Agent or Firm:
Murakami
Previous Patent: wire and steel wire
Next Patent: Superconducting coil manufacturing method and superconducting coil
Next Patent: Superconducting coil manufacturing method and superconducting coil