Title:
INFORMATION PROCESSING SYSTEM
Document Type and Number:
Japanese Patent JPS57164318
Kind Code:
A
Abstract:
PURPOSE: To avoid the effect on a system operation even if one power supply device is in failure, by supplying power to a common memory from two systems of power supply devices.
CONSTITUTION: Power is given to the 1st processor 301 from the 1st power supply device 501, and the power is provided to the 2nd processor 302 from the 2nd power supply device 502. Power is given to a common memory 40 from the 1st and 2nd power supply devices 501 and 502, respectively. A constant voltage circuit 41 in the common memory 40 is used to one power supply device with priority, if two power supplies are both normal.
Inventors:
MIZUNO SAKUYUKI
Application Number:
JP4991581A
Publication Date:
October 08, 1982
Filing Date:
April 02, 1981
Export Citation:
Assignee:
TOKYO SHIBAURA ELECTRIC CO
International Classes:
H02J1/00; G06F1/26; G06F1/30; G06F12/16; H02J1/10; (IPC1-7): G11C29/00