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Patent Searching and Data


Title:
INFORMATION PROCESSOR
Document Type and Number:
Japanese Patent JPS5960530
Kind Code:
A
Abstract:

PURPOSE: To use in common a data bus and to simplify the constitution by storing the information "0" in an artificial input/output device, and resetting plural buffers in the input/output control device by use of this information.

CONSTITUTION: A microprocessor device MP stores in advance "0", and a parity it "1" at a prescribed position in an artificial input/output device PIO. Subsequently, the device MP gives an instruction to data buffers DB0WDB2 so that data is transferred to an I/O device, and the data is not transferred to a storage device MEM. As a result, the buffers DB0WDB2 read out contents of the device PIO and store automatically its data "0". In this way, reset is executed automatically, and the devices DB0WDB2 do not use a data bus between the device MP and themselves. Accordingly, one data bus is used in common, and constitution of a circuit can be simplified.


Inventors:
SHIMADA TOSHIO
MATSUZAKI SHIGEHARU
Application Number:
JP17023082A
Publication Date:
April 06, 1984
Filing Date:
September 29, 1982
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F13/12; G06F1/24; (IPC1-7): G06F3/00
Attorney, Agent or Firm:
Eisuke Suzuki



 
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