Title:
INITIALIZING CIRCUIT ESPECIALLY FOR MEMORY REGISTER
Document Type and Number:
Japanese Patent JP2674677
Kind Code:
B2
Abstract:
PURPOSE: To obtain an intended initializing circuit for a memory register by providing an output terminal which is connected to the register and the initializing circuit and driven to a zero voltage when supplied voltage is dropped lower than a tripping value.
CONSTITUTION: A transistor MP1 is held in OFF state until a voltage reaches a conduction threshold, and the voltage at a node B is fixed at zero. As a result, as long as a power source is kept lower than the tripping voltage, an output terminal P1 of a circuit 1 continuously initializes a circuit 5. The imbalance between inverters 3 and 4 exists until a transistor MN3 is turned to conducted state. In the conducted state, the voltage at the node B becomes the tripping values and states on nodes C and D are inverted. Besides, the voltage at the node B is kept zero by resistors R1 and R2, and the power source reaches the tripping threshold. Therefore, the initializing circuit 1 can be operated even at the lower voltage.
Inventors:
Pierangelo confaronieri
Application Number:
JP31669492A
Publication Date:
November 12, 1997
Filing Date:
November 26, 1992
Export Citation:
Assignee:
SGS-Thomson Microelectronics Esse Elle Ele
International Classes:
G06F1/24; G11C7/20; G11C7/22; G06F12/16; H03K3/356; H03K17/22; (IPC1-7): G06F1/24; G06F12/16
Attorney, Agent or Firm:
Kazuo Kobashi (1 person outside)