PURPOSE: To enable the processing of computer and data scanning independently and to enable the operation with the newest data at the operation processing of computer.

CONSTITUTION: The timing control circuit 32 resets the address counter 33 after a given period and starts the input point scanning. On the other hand, DI in the process input signal is inputted to the data selection circuit 37 via the signal matching circuit SGC 35 and the analog input signal AI is via the AD converter 36. AI or DI selected with the address counter 33 is inputted to the direct memory access (DMA) transfer set 38, where the address of the data transfer area of the memory unit in the computer is calculated and the data is transferred. That is, when the process input unit 100 is given the bus exclusive use permission signal from the bus control unit 40, it exclusively uses the bus and transfers the data to the memory unit 12 of the computer.