PURPOSE: To decrease number of required components and to decrease the occupied area by sharing a part of elements for an input/output buffer circuit and a Schmitt circuit through the change of wirings.
CONSTITUTION: The 1st stage inverter consists of PMOSFETs Q1, Q3 and an NMOSFETQ2. A drain terminal of the FETs Q1, Q3 and output nodes n1, n1' are separated, and in constituting the input buffer circuit, the FETQ1 and the node n1 are connected and in constituting the Schmitt circuit, the FETQ3 and the node n1' are connected at aluminum wiring. Thus, an FETQ2 is used in common for both the circuits. On the other hand, the PMOSFETs Q4, Q5 and the NMOSFETQ5 constitute an inverter 2 of the output stage. The drain terminal of the FETQ6 and a node n1" are separated and they are connected together only in constituting the Schmitt circuit.
JP2020136694 | OUTPUT CIRCUIT |
YOU KANJI
HITACHI LTD
JPS5847323A | 1983-03-19 | |||
JPS5345985A | 1978-04-25 | |||
JPS5710533A | 1982-01-20 |