PURPOSE: To attain multi-function of applications and to prevent waste power consumption by using a transistor (TR) as a bias means of an input/output common use terminal and controlling the connection of the bias means to the input/output common use terminal corresponding to the logical level of an input/output switching signal and a bias selection signal.

CONSTITUTION: When the logical level of a data signal 6 is an H level, a P- channel MOS TR Q1 is conductive, a potential at the input/output common use terminal 4 is equipotential to a power supply voltage +VCC and an H level is outputted. WHen the level of the data signal 6 is an L level, an N- channel MOS TR Q2 is conductive, the potential at the input/output common use terminal 4 is equipotential to a common potential and an L level is outputted. Further, a bias TR Q3 of the bias circuit 3 is nonconductive by an H output of a NAND gate 14 when the level of the input/output switching signal 5 is an L level and the electric path between a power supply terminal and the input/output common use terminal 4 is interrupted. Thus, no waste power consumption through a bias resistor and the N-channel MOS TR is caused.