PURPOSE: To speed up the response of status information to open a central processing unit from the input and output unit, by providing the unit status buffer corresponding to each input and output unit in the input and output control unit.
CONSTITUTION: When the command instruction from a CPU1 is received with an input and output control unit IOC2, the IOC2 performs the pickup and analysis of status information related to the IOC2 including the command check immediately and stores the result in a controller status buffer CSB4. After that, the pickup and analysis for the status information of the input and putput unit I/O requiring much time are not directly made, and the content of the unit status buffer USB#K7 fetching in advance the information relating to the designated input and output unit I/O#K11 is read out, and after this and the content of CSB4 are edited into the format designated at an edition circuit 3, response is made to the CPU1.
JPS4978452A | 1974-07-29 | |||
JPS5243333A | 1977-04-05 | |||
JPS52119135A | 1977-10-06 | |||
JPS5495133A | 1979-07-27 |