PURPOSE: To reduce the number of steps and execution time of a program in a data processor by allowing an input-output controller to control the write and use of control blocks and the read of statuses, and also to supervise the surplusage of the number of reads and that of writes.

CONSTITUTION: On the execution of a buffer control block information output instruction by data processor 2, input-output controller 1 sets control information to buffer control circuit 20; on the execution of a transfer start instruction, the memory location and input-output transfer of main memory unit 3 assigned by circuit 20 are performed by transfer control circuit 21 and data are inputted or outputted to or from input-output device 4 through input-output control circuit 22. In circuit 20, a write address and read address indicating storage positions of transfer control information are increased and decreased by one on each read operation and write operation. Then, circuit 20 sends information inhibiting the write operation when the write address exceeds the total number of storage positions, or information inhibiting the read operation when the storage position of the read address is subtracted one by one down to zero to data processor 2.