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Title:
INPUT-OUTPUT PROTECTION CIRCUIT OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPH0322482
Kind Code:
A
Abstract:

PURPOSE: To prevent thermal breakdown of a diffused layer by enlarging the section of a contact hole of the diffused layer and an electrode wiring of an input-output protection circuit of a semiconductor device of which an input terminal and an internal circuit are connected through the diffused layer or by enlarging the section of the diffused layer.

CONSTITUTION: The parts of an N+ diffused layer 7-2a and a P+ type diffused layer 6-1a under a contact hole 5a1 are so formed as to be five times or more deeper than the parts of other diffused layers and so that a sheet resistance thereof is equal to the one of said parts. A current flowing when an overvoltage is impressed on a pad 10 flows to power source GND through diffusion resistances R1 and R2 according to the states of operation of transistors Trp and Trn. This current flows through the N+ diffused layer 7-2a and the P+ diffused layer 6-1a under the contact hole 5a1 which are so formed as to be five times or more deeper than the parts of other diffused layers, and therefore thermal breakdown of the diffused layers hardly occurs. When the overvoltage is impressed on the pad 10, the current is concentrated on the parts of contact holes. By making the areas of contact holes 5b1 to 5b4 whereon the concentration of the current occurs larger those of other contact holes 5, a current density in the parts of the contact holes 5b1 to 5b4 is reduced and the breakdown in these parts can be reduced.


Inventors:
OKUZUMI TETSUYA
Application Number:
JP15761789A
Publication Date:
January 30, 1991
Filing Date:
June 19, 1989
Export Citation:
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Assignee:
NEC CORP
International Classes:
H01L29/78; H01L21/8238; H01L27/092; (IPC1-7): H01L27/092; H01L29/784
Attorney, Agent or Firm:
Uchihara Shin



 
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