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Title:
INSPECTION METHOD OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2004226359
Kind Code:
A
Abstract:

To provide an inspection method of a semiconductor device, which can prevent the reduction in yield due to increase of contact resistance of electrodes of an inspection socket generated during a test for one lot in the inspection of packaged semiconductor device.

This inspection method comprises the steps of: sequentially attaching at least one semiconductor device of a plurality of first semiconductor devices and at least one second semiconductor device having a plurality of terminals short-circuited in a package to at least one inspection socket having a plurality of electrodes; recognizing whether the attached semiconductor device is a first or second semiconductor device; a measuring the impedance among the plurality of the electrodes of the inspection socket when it has been recognized that the attached semiconductor device is a second one; and cleaning the plurality of the electrodes of the inspection socket determined to have an impedance of not less than a predetermined value.


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Inventors:
KOBAYASHI KATSUMI
Application Number:
JP2003017409A
Publication Date:
August 12, 2004
Filing Date:
January 27, 2003
Export Citation:
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Assignee:
SEIKO EPSON CORP
International Classes:
G01R31/26; (IPC1-7): G01R31/26
Attorney, Agent or Firm:
Masahiko Ueyanagi
Fujitsuna Hideyoshi
Osamu Suzawa