INSTRUCTION GENERATION METHOD, ARITHMETIC PROCESSING DEVICE, AND INSTRUCTION GENERATION DEVICE

Title:

INSTRUCTION GENERATION METHOD, ARITHMETIC PROCESSING DEVICE, AND INSTRUCTION GENERATION DEVICE

Document Type and Number:

Japanese Patent JP2023064860

Kind Code:

A

Abstract:

To generate a data transfer instruction which can execute data transfer at low cost according to the architecture of a processor.SOLUTION: An instruction generation method which generates an instruction which makes an arithmetic processing device having a plurality of first blocks including a plurality of computation execution units execute generates at least one data transfer instruction which makes the arithmetic processing device execute at least one of a plurality of data transfers in which a transfer source is the computation execution unit and a transfer destination is the computation execution unit, or the plurality of data transfers in which the transfer source is the first block and the transfer destination is the first block, by at least one processor.SELECTED DRAWING: Figure 4

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Inventors:

NISHIKAWA TAKASHI

Application Number:

JP2021175277A

Publication Date:

May 12, 2023

Filing Date:

October 27, 2021

Export Citation:

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Assignee:

PREFERRED NETWORKS INC

International Classes:

G06F9/315; G06F8/41

Attorney, Agent or Firm:

Tadashige Ito
Tadahiko Ito

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