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Patent Searching and Data


Title:
INSTRUCTION RETRY PROCESSING SYSTEM
Document Type and Number:
Japanese Patent JPS5858658
Kind Code:
A
Abstract:

PURPOSE: To retry an instruction even in case of an instruction of plural processing flows, by converting the instruction to a dummy and executing it before an suppressed processing flow, and normally executing the instruction after the suppressed processing flow, when retrying the instruction.

CONSTITUTION: An instruction retry controlling circuit 3 instructs to retry an instruction, to an instruction controlling circuit 1 through a signal line l34 by use of a result of detection of an instruction processing suppressing flow sent from a signal line l2. When retrying an instruction of plural processing flows, the instruction retry controlling circuit 3 executes the instruction in a state that write to a register and store in a memory by the suppressed instruction, until the processing flow immediately before the suppressed processing, and after the flow by which the suppressed processing, the instruction controlling circuit 1 is set to a state that the instruction can be executed normally, and the remaining part of the instruction is executed, by which the instruction of plural processing flows is retried. When retrying the instruction, a data of a save register circuit 4 is read out as an operand address.


Inventors:
MATSUZAKI SHIGEHARU
TSUNODA HARUHIKO
Application Number:
JP15643981A
Publication Date:
April 07, 1983
Filing Date:
September 30, 1981
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F11/14; (IPC1-7): G06F11/14
Attorney, Agent or Firm:
Kyotani Shiro