PURPOSE: To enable to decrease the number of generation processes without exercising influence on the test program generation method, by executing the test of an instruction word by means of each module of smaller scale.

CONSTITUTION: When an instruction word on the main memory device 1 has been loaded in the instruction register 3 by the instruction readout circuit 2, the instruction code part 4 is compared with the register 14 storing the instruction code of the module instruction, by the comparator 15. As a result, in case of coincidence, the FF16 is turned on. Also, the contents of the instruction operand part 5 are transferred to the register 17, and the processing start address of this module in the register group 18 is set to the register 19. When the instruction readout processing has been finished, the FF6 is turned on by the instruction readout circuit 3. On the other hand, since the FF16 is turned on, the AND gate 20 is turned on, the contents of the register 19 are set to the control memory address register 8 by the FF21, and the module processing is executed. When the module instruction has been finished, the AND gate 23 is turned on, and the FF13 showing the end of the instruction word is turned on.