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Patent Searching and Data


Title:
INSULATED GATE TYPE TRANSISTOR AND INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPS5632757
Kind Code:
A
Abstract:

PURPOSE: To remarkably decrease the leakage current of an IGFET at the time of breaking it even in a short channel structure by forming a reverse conductivity type high impurity density region to a source region in the vicinity of the source region in a substrate region under a gate insulating film forming the IGFET.

CONSTITUTION: A P+ type chabnel-breakdown region 18 is diffused in the periphery of a P type semiconductor substrate 11, a thick field oxide film 16 is coated thereon, and N+ type source region 12 and drain region 13 are diffused in the substrate 11 surrounded by the film 16. Then, a gate electrode 14' made of P+ type polycrystalline Si is formed through a gate insulating film 14 on the surface of a substrate 11 exposed between the regions 12 and 13, and a PSG film 17 is coated on the entire surface. Thereafter, openings are perforated at the film 17, an aluminum electrode 12' is coated on the region 12, and an N+ type polycrystalline Si electrode 13" is coated on the region 13, and a further thinner oxide film 31 is formed on the electrode 13" with an aluminum electrode 32 formed thereon. In this configuration a P+ type region 33 is newly additionally formed in the vicinity of the region 13 in the substrate 11.


Inventors:
NISHIZAWA JIYUNICHI
OOMI TADAHIRO
Application Number:
JP10837779A
Publication Date:
April 02, 1981
Filing Date:
August 25, 1979
Export Citation:
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Assignee:
HANDOTAI KENKYU SHINKOKAI
International Classes:
H01L27/10; H01L21/8242; H01L27/04; H01L27/108; H01L29/49; H01L29/78; (IPC1-7): H01L27/10; H01L29/78