Title:
INTEGRATED AMPLIFIER
Document Type and Number:
Japanese Patent JPH05206757
Kind Code:
A
Abstract:
PURPOSE: To obtain a high common mode and the high suppression rate of a power source by keeping the collectors transistors at reference voltages, reflecting a current supplied from a prescribed circuit to a resistor leading an inter-emitter input signal at a resistor, and providing output signals from both terminals of this resistor. CONSTITUTION: The respective collectors of bipolar transistors (Q) 1 and 2 biased lower than 1μA by constant current sources IP3 and 4 are kept at respective fixed reference voltages VR1 and 2. Besides, an input signal Vin impressed between emitters 1N- and 1N+ of Q1 and Q2 is led to a resistor R1 and a current mirror circuit is composed of Q5, Q6, Q7, MOS transistors M7, M10 and M9, and resistors R3-R6. Therefore, a current IR1 to be supplied from this circuit to the resistor R1 is reflected to a resistor R6 and an output signal Vout is provided at both terminals. Thus, the input common mode, power source suppression ratio and input impedance are improved and the I/F circuit of optimum control unit for a vehicle can be obtained.
Inventors:
MAZZUCCO MICHELANGELO (IT)
POLETTO VANNI (IT)
MORELLI MARCO (IT)
POLETTO VANNI (IT)
MORELLI MARCO (IT)
Application Number:
JP20110692A
Publication Date:
August 13, 1993
Filing Date:
July 28, 1992
Export Citation:
Assignee:
ST MICROELECTRONICS SRL (IT)
MARELLI AUTRONICA (IT)
MARELLI AUTRONICA (IT)
International Classes:
H03F3/45; G01N27/409; (IPC1-7): G01N27/409; H03F3/45
Attorney, Agent or Firm:
Aoyama Ryo (1 person outside)