Title:
INTEGRATED CIRCUIT AMPLIFIER FOR ADAPTIVE OFFSET AND ITS METHOD
Document Type and Number:
Japanese Patent JP11041047
Kind Code:
A
Abstract:
To provide an integrated circuit amplifier that sets a bias voltage of a converter to minimize a standby current.
A warning amplifier 10 has an operational amplifier 30 that sets a bias of a peak detector 22 and a converter 32 dynamically to minimize a standby current. When no input call signal is received at an input terminal 12, the standby current in the converter 32 is zero. A bias voltage to the converter 32 is adjusted below a reference voltage in response to the input call signal to minimize a voltage in the converter 32 while the warning amplifier 10 is activated.
Inventors:
Hanna, John E.
Application Number:
JP1998000199651
Publication Date:
February 12, 1999
Filing Date:
June 29, 1998
Export Citation:
Assignee:
MOTOROLA INC
International Classes:
H03G3/30; H03F1/02; H03G3/30; H03F1/02; (IPC1-7): H03G3/30
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