To provide an integrated circuit for controlling mass storage peripheral devices.

The integrated circuit 12 used for a computer system having a host computer 11 and at least mass storage peripheral devices includes a control circuit for the mass storage peripheral devices 12 for receiving the information from the devices and an interface circuit for interfacing the information from the devices to the host computer 11 via a bus mastering bus of the host computer 11, for example, a PCI bus, 1394 bus or similar buses. This integrated circuit is arranged in the host computer 11 and is adapted so as to be interfaced to the peripheral devices. The integrated circuit may include part of a read-out channel circuit which is connected to thereto in order to receive the information from the peripheral devices. The integrated circuit may further include another circuits for controlling and operating, for example, a digital signal processor, buffer manager 33, speed matching buffer and servo logic or similar logic for controlling the servo circuits for rotating motors of the peripheral devices.