Title:
INTEGRATED CIRCUIT DEVICE AND DATA TRANSMISSION SYSTEM
Document Type and Number:
Japanese Patent JP2011010118
Kind Code:
A
Abstract:
To compensate for signal propagation delay caused by crosstalk between transmission lines.
An integrated circuit device 3 includes I/O cells 401-409 for connecting to external interfaces for each of transmission lines running in parallel. The integrated circuit device 3 includes: control signal generators 301-304, 701-704 configured to detect a phase relationship among data signals DQ0-DQ7 respectively input into the I/O cells, and to generate control signals based on the detected phase relationship; and a switching drive controller configured to control the driving of the I/O cells in response to the control signals generated by the control signal generators.
Inventors:
ANDO NARIYOSHI
Application Number:
JP2009152672A
Publication Date:
January 13, 2011
Filing Date:
June 26, 2009
Export Citation:
Assignee:
FUJITSU SEMICONDUCTOR LTD
International Classes:
H04L25/03; H04B3/50; H04L25/02; H04L25/08
Domestic Patent References:
JP2008278518A | 2008-11-13 | |||
JP2002009605A | 2002-01-11 | |||
JP2001217509A | 2001-08-10 |
Foreign References:
WO2008085943A2 | 2008-07-17 |
Attorney, Agent or Firm:
Tadahiko Ito
Akinori Yamaguchi
Akinori Yamaguchi
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