Title:
INTEGRATED CIRCUIT DEVICE
Document Type and Number:
Japanese Patent JPS57130441
Kind Code:
A
Abstract:
PURPOSE:To obtain an IC having no warp and no peeling off by a method wherein a plate type member consisting of a double structural compound material of fiber having the rate of thermal expansion being approximate to the rate of thermal expansion of both of a semiconductor element and an insulating substrate is made to be interposed between a circuit element containing the semiconductor element and the insulating substrate. CONSTITUTION:A heat radiating plate 4 of Cu, Ag, etc., having favorable thermal conductivity is fixed on the back of an insulating substrate 3 consisting of Al2O3 interposing Pb-Sn solder 5 between them, and disk 2 of metal, etc., is equipped on the surface using solder 5 of the same composition. Then the circuit element containing the semiconductor element 1, etc., is fixed on the disk 2 using samely Pb-Sn solder 5 to constitute the IC device. At this constitution, a Cu-C material applied with Cu plating is used as the disk 2 to negate warp originated from difference of the rate of thermal expansion. Namely, a base material 11 consisting of the compound material of fiber 13 of Cu alloy containing 55vol% C is used on the element 1 side of the disk 2, and a base material consisting of Cu alloy containing 45vol% C s used being laminated on the substrate 3 side interposing Cu foil 12 between them.
Inventors:
CHIBA AKIO
SHIMIZU SEIKI
KUNIYA KEIICHI
OONUKI HITOSHI
SHIMIZU SEIKI
KUNIYA KEIICHI
OONUKI HITOSHI
Application Number:
JP1569581A
Publication Date:
August 12, 1982
Filing Date:
February 06, 1981
Export Citation:
Assignee:
HITACHI LTD
International Classes:
H01L21/52; B32B7/027; B32B15/14; C22C49/14; H01L21/58; H01L23/373; H01L23/492; H01L31/0392; (IPC1-7): H01L21/58