PURPOSE: To minimize the wiring length when large circuit blocks, I/O buffers, and circuit elements are interconnected on a substrate.

CONSTITUTION: A major net list contains the relationship of connections of large circuit blocks 4, I/O buffers 6, and circuit elements 5. A minor net list contains the relationship of connections between the large circuit block 4 and the I/O buffers 6, which is extracted from the major net list. According to the minor net list, the large circuit blocks are arranged in the peripheries within a core region of the surface of a substrate. The arrangement of the large circuit blocks is such that the wiring length is minimized between the large circuit blocks and the I/O buffers and between the large circuit blocks. The circuit elements are arranged within the core region where the large circuit blocks are not located.