INTEGRATED CIRCUIT MEMORY WITH ROW-VOLTAGE HOLDING CIRCUIT

Title:

INTEGRATED CIRCUIT MEMORY WITH ROW-VOLTAGE HOLDING CIRCUIT

Document Type and Number:

Japanese Patent JPH07287986

Kind Code:

A

Abstract:

PURPOSE: To obtain a circuit, in which bit line voltage is kept constant during the writing of the value of a binary number.

CONSTITUTION: A voltage holding circuit 15 has a differential amplifier 16, and the differential amplifier measures the difference of reference voltage VD given by a voltage divide and voltage reflecting a bit line. A signal 24 reducing the difference of the voltage is output, and applied to a gate for the transistor T3 of bit-line addressing circuit selection, and the voltage of a bit line is kept constant.

Inventors:

ORIBUIE RUI

Application Number:

JP9956195A

Publication Date:

October 31, 1995

Filing Date:

March 31, 1995

Export Citation:

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