To provide an integrated circuit and an image inputting/outputting device using the integrated circuit capable of preventing the convergence of urgently processed image data transfer and normally processed image data transfer, and easily being adaptive to an image inputting device or an image display device whose specifications are different.

The integrated circuit 100 is provided with a first bus 101, a first DMA controller 120, a second bus 102 and a second DMA controller 103 connecting the first bus 101 and the second bus 102. A main memory 200 is connected to the first bus 101, and a frame memory 400 is connected to the second bus 102. Thus, it is possible to prevent the convergence of image data transfer (urgently processed data transfer) between an image input device 500 and the frame memory 400 and between an image display device 600 and the frame memory 400 and of image data transfer (normally processed data transfer) between the main memory 200 and the frame memory 400.