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Title:
INTEGRATED CIRCUIT FOR TIMEPIECE
Document Type and Number:
Japanese Patent JPS61137093
Kind Code:
A
Abstract:

PURPOSE: To perform the high speed circuit test of an integrated circuit for a timepiece without consuming wasteful power, by allowing a part of FF of a frequency dividing circuit to function in place of a selector and directly inputting a reference frequency signal to the frequency dividing circuit.

CONSTITUTION: A T-terminal 4 is brought to L by external operation and a high speed signal Pf is inputted from a terminal 2. An inverter 11 outputs a reversal signal -Pf and a NOR gate 12 outputs the inverse phase of the signal -Pf, that is, the signal Pf. The output of FF7a is H when the signal Pf is H and comes to L when the signal Pf is L, that is, the signal -Pf is H. Therefore, the output of FF7a comes to the same signal as the signal Pf and the signal Pf is inputted to a frequency dividing circuit 7b. By this method, the high speed circuit test of the integrated circuit for an electronic timepiece can be performed through the circuit 7b.


Inventors:
KIHARA HIROYUKI
Application Number:
JP25890284A
Publication Date:
June 24, 1986
Filing Date:
December 07, 1984
Export Citation:
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Assignee:
CITIZEN WATCH CO LTD
International Classes:
G04C3/00; G04D7/12; G04G99/00; (IPC1-7): G04C3/00; G04G1/00



 
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