To obtain a pull-up resistance or pull-down resistance with linear resistance characteristics by providing a pull-up resistance means, which has the gate electrode of a 1st P-type transistor(TR) connected to a 2nd power source or a specific potential developing a gate-source voltage larger than a threshold voltage and the gate electrode of a 2nd P-type TR connected to an input terminal.
The P-type MOS TR P1 has its gate terminal connected to a ground power source Vss or a specific control terminal, which holds the gate-source voltage above the threshold voltage. The P-type MOS TR P2, on the other hand, has its gate terminal connected to the input terminal IN (a). The P-type MOS TR P1 has diode characteristics as shown by a broken line 20, and the P-type MOS TR P2 has diode characteristics shown by a broken line 21. Therefore, when both the P type-MOS TRs P1 and P2 are put together, the input current Iin has nearly linear characteristics like the solid line 22.
JPH0645527 | SEMICONDUCTOR DEVICE |
JPS62145764 | SEMICONDUCTOR INTEGRATED CIRCUIT |
JP3213711 | LOGIC CHIP |
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