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Title:
INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPS5490979
Kind Code:
A
Abstract:

PURPOSE: To make suitable the IC the massproduction, by forming the transistor region of enhancement and depletion type, and by selecting the type of transistor as required, or forming the both at the same time.

CONSTITUTION: The SiO2 film 2 is coated on the N type Si substrate 1, the region forming the enhancement transistor 3 and depletion type transistor 4 is removed, and the thin SiO2 film is produced on it. Next, the SiO2 film corresponding to the source, drain and cross under region is removed, and the P type polycrystal Si layer 4 and the SiO2 film 5 are grown on the entire surface. After that, the polycrystal layers 532 and 542 being the gate of two transistors are made independent with photo etching, and the P type source and drain regions 931, 941, 933 and 943 are formed in the substrate 1 at the both sides by diffusion. Next, the SiO2 film 7 is coated on the entire surface, opening is provided, and the electrode 832 when the enhancement type is desired to obtain, and the electrode 842 when the depletion type is desired, are respectively selected.


Inventors:
HAYASHI YUTAKA
TARUI YASUO
Application Number:
JP15204578A
Publication Date:
July 19, 1979
Filing Date:
December 11, 1978
Export Citation:
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Assignee:
KOGYO GIJUTSUIN
International Classes:
H01L21/8236; H01L27/088; H01L29/423; H01L29/43; H01L29/49; H01L29/78; (IPC1-7): H01L27/08; H01L29/62; H01L29/78